• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    The invention relates to a method for soldering at least one electronic component (104, 204, 304, 404, 504) to a carrier plate (100, 200, 300, 400, 500), wherein the carrier plate has at least one carrier plate contact surface (102, 202, 302 , 402, 502) and the at least one electronic component has at least one corresponding component contact surface (105), wherein the at least one carrier plate contact surface is surrounded by a solder mask layer (101, 201, 301, 401, 501) which delimits the at least one carrier plate contact surface, the method comprising the steps of: a) depositing at least partially solder paste (106, 206, 306, 406, 506) on the solder resist layer (101, 201, 301, 401, 501) and in minimal overlap with that adjacent to the solder resist layer Carrier plate contact surface (102, 202, 302, 402, 502), b) loading the carrier plate with the at least one electronic component (104, 204, 304, 404, 504), wherein the at least one component contact surface (105) at least partially covers the corresponding at least one carrier plate contact surface (102, 202, 302, 402, 502), and c) heating the solder paste (106, 206, 306, 406, 506) to Producing a soldered connection between the carrier plate and the at least one component.
    公开号:AT516750A4
    申请号:T50924/2014
    申请日:2014-12-18
    公开日:2016-08-15
    发明作者:Erik Edlinger
    申请人:Zizala Lichtsysteme Gmbh；
    IPC主号:
    专利说明:

    Method for void reduction in Löstellen
    The invention relates to a method for soldering connecting at least one electronic component to a carrier plate, wherein the carrier plate has at least one carrier plate contact surface and the at least one electronic component at least one corresponding component contact surface, wherein the at least one carrier plate contact surface is surrounded by a Lötstopplackschicht the limited at least one support plate contact surface.
    The attachment of electronic components to carrier plates, for example to printed circuit boards or printed circuit boards, is a very frequently required process in the manufacture of electrical circuits. In this case, printed circuit boards generally have printed conductors which connect one or more connecting contacts to one another, wherein individual electronic components are connected to the electrical connecting contacts. The connection can fulfill several aspects such as electrical, mechanical and / or thermal connection.
    From the prior art, various methods have become known by means of which a connection of an electronic component can be realized with a support plate. For example, contact surfaces of individual electronic components, also referred to below as component contact surfaces, can be soldered to contact surfaces arranged on the carrier plates (also referred to below as carrier contact surfaces).
    At this point, reference is made to the SMT method (Surface Mount Technology), in which the electrical connections or contact surfaces of the electronic component and the corresponding contact surfaces of the carrier plate are respectively at the surface and the electronic components are attached only to the surface of the carrier plate must be and can be dispensed with the provision of through holes. The contact surfaces of the carrier plate are in this case first coated with a solder, usually a solder paste. Following the assembly of the carrier plate with individual electronic components.
    To produce a permanent electrical and / or thermal and / or mechanical connection of the electronic components to the carrier plate, for example, the reflow soldering method has become known, in which the solder paste and the contact surfaces are heated after the assembly with the electronic components in such a way that the solder paste melts and connects to the contact surfaces of the support plate and the respective electronic component.
    In the classical SMT process, a solder paste contains both a solder (which permanently bonds the contact surfaces involved) and flux, which improve the solderability (in particular the flow and wetting behavior) of the solder by removing oxides on the surfaces of the contact surfaces. Excess flux embedded in the solder paste becomes gaseous upon heating and melting of the solder paste and escapes in the form of bubbles. The solder paste is usually applied in a screen or mask printing process in the form of solder deposits on a support plate before electronic components are placed on it. The shapes of the solder deposits generally follow the shape of corresponding carrier plate contact surfaces, so that the paste is applied only to the carrier plate contact surfaces.
    One problem frequently encountered in SMT technology is the formation of voids called solder voids in the solder joints. One possible cause of the formation of voids is that the solder embedded in the solder paste can not completely escape solder during soldering and therefore accumulates within the solder joint. These voids not only have a negative impact on the service life and the thermal conductivity of the solder joint, they can also lead in the worst case to the total failure of the electronic component and are therefore often used as an exclusion criterion or quality feature, resulting in very high additional costs in the production of PCBs or leads to a high level of PCBs. Here, the percentage area of the voids is the criterion of choice for the selection of reject parts. For particularly large components, the number of voids is higher, as larger areas of the surface of the printed solder are covered by the component and the outgassing flux therefore has to travel a longer distance until it can escape to the outside via the free side surfaces; consequently, the committee is also much higher here. If you can prevent or minimize the training of voids, the committee could therefore be significantly reduced.
    US 8,678,271 B2 discloses a method for preventing void formation by providing the contact surfaces with a preformed solder paste layer (known as solder preform or solder preform). The preformed solder paste layer is patterned prior to loading to create outgassing channels for draining outgassing flux.
    US 2009/0242023 A1 discloses a soldering process in which the solder paste is printed in various structures to produce outgassing channels for draining outgassing flux.
    JPS63273398 A describes a method in which solder paste is printed adjacent to the areas of the PCB pad where the component pads are positioned. For this purpose, the PCB contact surface is pulled out next to the component and the solder paste is thus applied before soldering next to the assembled component exclusively on the PCB contact surface. When soldering a portion of the molten solder paste is pulled under the component, but not necessarily creates a capillary action. This method is specific to components that are contacted via the side surfaces of the electrodes.
    It is therefore an object of the invention to provide a soldering method with which the formation of voids in solder joints can be prevented or minimized and in this way the rejection of printed circuit boards can be reduced and the service life of the soldered components can be increased.
    This object is achieved by a method for soldering at least one electronic component to a carrier plate as mentioned at the outset, which is characterized by the following steps: a) at least partially applying solder paste to the solder mask layer and in minimal overlap with the carrier plate cone adjoining the solder mask layer beating surface (also referred to herein as a pad), b) loading the carrier plate with the at least one electronic component, wherein the at least one component contact surface at least partially covers the corresponding at least one carrier plate contact surface, and c) heating the solder paste to produce a soldered connection between the Support plate and the at least one component.
    Thanks to the invention, which provides a targeted atypical distribution of the solder paste outside the pads on the Lötstopplackschicht and with only minimal overlap with the pad, voids can be prevented in solder joints or reduced to a minimum. The invention uses the flow properties of the melting solder paste and additionally utilizes the capillary effect. Targeted avoidance of solder paste directly under the pad allows outgassing of excess flux before the solder flows between the component and the pad, thus virtually avoiding blistering. Thus, it was found in tests (see Example 1 below) that the formation of voids can be significantly reduced with the soldering method according to the invention. This not only minimizes waste and increases the life of electronic components; Also, the amount of solder paste required can be saved by about 40% thanks to the method according to the invention. The invention is applicable to solder pads with any pad shape and any type of components.
    As solder pastes particularly suitable for the invention, SAC (SnAgCu) solders are e.g. SAC 305 (reference source, for example: Fa. Kester) and common flux-containing squeegee solders to call. For the invention, all common and known to a person skilled in the art solder resists, e.g. Epoxy resins, suitable.
    The contact surfaces of the carrier plate and the components are advantageously coated with tin, silver and / or gold. A tin, silver or gold layer protects the pads from corrosion and may be applied to other electrically conductive layers (e.g., copper) disposed beneath the protective layer
    In practice, the carrier plate contact surfaces (carrier-plate-side pads) and the corresponding component contact surfaces (component-side pads) are usually quadrangular, in particular rectangular, each with two longitudinal and transverse sides. However, pads are also known which have more than four sides (polygons) or have a different shape, e.g. a circular or oval shape.
    As used herein, the term "in minimal overlap with the backing plate contact surface adjacent to the solder mask layer" means that the solder paste only overlaps with the backing plate contact surface and, after component mounting, with the component contact surface, that the capillary effect through which the melted surface contacts The depth of this overlap is usually given by the tolerances of the printing of the solder paste, the solder paste being usually formed in a manner known per se in a screen or mask printing process Preferably, the depth of minimum overlap of the solder paste with the substrate contact surface is in a range of 0.2-0.5 mm More preferably, the depth of minimum overlap is about 0.3 mm; this corresponds to bad usually twice the tolerance of the printing process.
    Preferably, the carrier plate contact surface is formed substantially square and the solder paste is applied in minimal overlap with the carrier plate contact surface along a longitudinal side and / or a transverse side of the carrier plate contact surface on the Lötstopplackschicht. Depending on the design of the pad pads, the solder paste is applied along one longitudinal side, along a lateral side or along a longitudinal side and a lateral side (also referred to herein as narrow side or broad side) of the pad to the adjacent solder mask layer with minimal overlap applied with the pad. For rectangular support plate contact surfaces, the longitudinal side is mutatis mutandis longer than the transverse side. In a square shape of the support plate contact surface whose longitudinal side and the transverse side are mutatis mutandis the same length.
    In a sub-variant, the solder paste is therefore applied in minimal overlap with the carrier plate contact surface along a longitudinal side of the carrier plate contact surface on the Lötstopplackschicht.
    In a further sub-variant, the solder paste is thus applied in minimal overlap with the carrier plate contact surface along a transverse side of the carrier plate contact surface on the Lötstopplackschicht.
    If one offers the solder paste next to only one side edge of the contact surface in minimal overlap with the side edge, then the solder front typically spreads parallel to this edge. In order to influence the propagation direction of the soldering front and to facilitate the displacement of the atmosphere under the component, it has proved to be advantageous if the solder paste in minimal overlap with the carrier plate contact surface along one longitudinal side and a transverse side of the carrier plate contact surface on the Lötstopplackschicht is applied. In this variant, in which the solder paste overlaps on one longitudinal side and one transverse side at the same time, the soldering front runs essentially diagonally and, without being bound to a certain theory, clearly indicates a certain direction for the atmosphere to be escaped. This variant has proved to be particularly advantageous in experiments for large pads in which the air must be effectively displaced under the component, e.g. for light-emitting diodes (LED) with large support plate contact surfaces, e.g. the OSLON Black Flat LED with two emitting surfaces.
    As an alternative to the aforementioned embodiment, in another embodiment, the overlap of the solder paste with the contact surface along a side edge (longitudinal side or transverse side) can be varied, i. The overlap thereby increases in regions along the side edge from a minimum value as defined below ("minimum overlap"). Accordingly, the solder paste is applied to the solder mask layer along a longitudinal side or a lateral side of the carrier, with the depth of overlap of the solder paste with the carrier plate contact surface In a sub-variant, the largest (maximum) overlap is achieved substantially in the middle of the side edge, in another variant the maximum overlap is achieved at one end of the side edge In the case of particular developments, the greatest overlap may extend as far as the opposite side edges of the carrier plate pad. Sectors of greater overlap are expediently provided in such a way that they displace the atmosphere and re-flow of solder into the area facilitate where displacement is difficult. This embodiment too has proved to be particularly advantageous for large pads in which the air must be effectively displaced under the component, e.g. for light-emitting diodes (LED) with large support plate contact surfaces, e.g. the OSLON Black Flat LED with two emitting surfaces.
    Advantageously, the depth of the minimum overlap of the solder paste with a substantially rectangular support plate contact surface along a longitudinal side of the carrier plates contact surface in a range of 0.2 - 0.5 mm. More preferably, the depth of minimum overlap is about 0.3 mm; this usually corresponds to twice the tolerance of the printing process.
    With respect to the application of solder paste along a transverse side of a substantially rectangular support plate contact surface, it is advantageous if the depth of the minimum overlap of the solder paste with the support plate contact surface along a transverse side of the support plate contact surface a range of 0.3 - 0.7 mm lies. More preferably, the depth of the minimum overlap is about 0.5 mm.
    If the carrier plate contact surface is substantially square, i. the longitudinal side and the lateral side are substantially equal in length, then the depth of the minimum overlap of the solder paste along a side edge of the square support plate contact surface is in a range of 0.2-0.5 mm, more preferably about 0.3 mm.
    After the defect-free loading of the carrier plate with the component, the depth of the overlap of the solder paste with the component contact surface substantially corresponds to the abovementioned depth of overlap of the solder paste with the carrier plate contact surface. In this way, the capillary effect is optimally utilized.
    In addition to the onset of capillary effect, the overlap adjustment ensures adhesion and attachment of the component to the backing plate during transport on the SMT production line.
    Preferably, the at least one component contact surface completely covers the corresponding at least one carrier plate contact surface. In this way, the capillary effect can be used particularly well.
    In particular embodiments, it may be advantageous if, in or after step b), the at least one electronic component is additionally fixed to the carrier plate by means of adhesive dots. This allows a particularly positionally stable fixation of the electronic component.
    In an advantageous development of these embodiments, the adhesive dots consist of a thermosetting adhesive material, wherein the temperature required for heat curing is below the melting temperature of the solder paste. This ensures the production of a stable position connection of the at least one electronic component with the carrier plate before the melting of the solder paste, whereby a displacement, rotation or blurring of the component can be reliably prevented.
    Alternatively, any other adhesive methods and adhesive materials may be used.
    In particular embodiments, the at least one electronic component has at least two component contact surfaces, and the carrier plate has at least two respectively corresponding carrier plate contact surfaces. In these embodiments, a kind of air channel (exhaust channel) is formed between the pads, which serves as a derivative of the outgassing flux and the displaced atmosphere under the component. These embodiments are particularly advantageous for large components. The design or layout, the dimension and the number of pads and the discharge channels between the pads are expediently dimensioned as a function of the maximum measured void size and depending on the applied solder paste, which is within the discretion and ability of a person skilled in the art. The combination of the method according to the invention with the corresponding layout of the pads and air ducts leads to reproducible and in terms of number and size of voids reduced solder joints. The layout, the dimension and the number of pads on the component side are usually specified by the component manufacturers.
    The invention is very well suited for the soldering connection of SMD components (surface-mounted device) and optoelectronic components, in particular LED components (light emitting diode), with carrier plates such as printed circuit boards. The invention is also applicable to the soldering connection of other optoelectronic components, e.g. Laser, an advantage.
    The invention together with further embodiments and advantages is explained in more detail below with reference to exemplary, non-limiting embodiments, which are illustrated in the accompanying drawings. This shows
    1 is a perspective view of a carrier plate after the printing of the solder paste just before equipping with an electronic component,
    Fig. 2 a-c show the individual steps of the method according to the invention, i. Printing on solder paste, loading the electronic component and heating the solder paste on the basis of sectional views through the view from FIG. 1,
    3a and 3b a solidified solder joint with adhesive dots which fix the electronic component in plan view (FIG. 3a) and in side view (FIG. 3b), FIG.
    4 shows a plan view of an exemplary layout of contact surfaces and printed solder surfaces for soldering a diode having four emitter surfaces on a carrier plate,
    5 shows a plan view of a further exemplary layout of contact surfaces and printed solder surfaces for soldering a diode with two emitter surfaces on a carrier plate,
    6 shows a plan view of a further exemplary layout of contact surfaces and printed solder surfaces for solderingly connecting a diode with two emitter surfaces on a carrier plate, and FIG
    7 shows a plan view of a further exemplary layout of contact surfaces and printed solder surfaces for the soldering connection of a diode with two emitter surfaces on a carrier plate.
    1 shows a perspective schematic view of a carrier plate 100 (printed circuit board 100) which has two carrier plate contact surfaces 102 (pads) and in each case two lines 103 leading to the carrier plate contact surfaces 102. The carrier plate contact surfaces 102 are each formed as part of a copper surface (see FIGS. 2a-c), which may preferably be coated with silver, tin and / or gold, and are surrounded by a solder mask layer 101 in a manner known per se. The Lötstopplackschicht 101 limits the respective support plate contact surfaces 102. The lines 103 may run in a conventional manner also below Lötstopplackschicht 101. This carrier plate 100 corresponds to a carrier plate, as known from the prior art. Along a longitudinal side 102 a of the respective carrier contact surfaces 102 solder paste 106 is printed on the Lötstopplackschicht 101. The solder paste 106 is printed so that it overlaps with the carrier contact surface 102 along its longitudinal side 102a minimally. The depth of this overlap is usually given by the tolerances of the printing of the solder paste 106 and is approximately 0.3 mm in the example shown; this corresponds to the usual double tolerance of the printing process. A method of applying solder paste 106 known in the art is the stencil printing process, which enables the application of particularly accurate shapes of solder paste of constant height.
    Fig. 1 also shows an electronic component 104, here an LED, which is to be mounted on the support plate 100 via a soldering connection. The component 104 has two component contact surfaces 105 that correspond to the carrier plate contact surfaces 102. The component contact surfaces 105 are indicated by dashed lines. The component contact surfaces 105 are substantially congruent with the carrier plate contact surfaces 102.
    2a-c show the individual steps of the method according to the invention by means of sectional views through the arrangement of Fig. 1. Fig. 2a shows the printing of solder paste 106 on the Lötstopplackschicht 101 of the support plate 100 along each one longitudinal side 102a of the support plate contact surfaces 102 and 2b shows the loading of the carrier plate 100 with the electronic component 104, wherein the component 104 is positioned on the carrier plate 100 so that the respective component contact surface 105 covers the respective corresponding carrier plate contact surface 102. The component contact surfaces 105 can now be connected to the solder paste 106 or the solder contained therein with the support plate contact surfaces 102. Fig. 2c now shows the soldering process itself, in which the solder paste 106 is heated and the solder contained in the solder paste 106 melts and is drawn by the capillary forces in the solder joint portion 109 between the carrier plate contact surface 102 and component contact surface 105. The outgassing of the solder paste 106 flux escapes not directly in the solder joint area 109, but already prematurely, as indicated by the reference numeral 108. Any bubbles that still move inwardly into the solder bump region 109 may be drained via the air channel 110 formed between the carrier plate contact surfaces 102.
    3a-b shows a development of the solidified solder joint arrangement shown in FIGS. 1 and 2a-c in plan view (FIG. 3a) and in side view (FIG. 3b). In the solder joint arrangement shown in FIGS. 3 a and 3 b, the electronic component 104 is additionally fixed to the carrier plate 100 by means of adhesive dots 111. The adhesive dots 111 are arranged at two opposite corners of the substantially rectangular component, but other adhesive dot arrangements are also possible. The provision of adhesive dots 111 allows a particularly positionally stable fixation of the component 104. The adhesive dots 111 consist of a thermosetting adhesive material, wherein the temperature required for the heat curing of the adhesive dots temperature is below the melting temperature of the solder paste 106. For example, can be used as thermosetting adhesive Loctite 3621 (source: Henkel) and as solder paste SAC305 (source: Kester). This ensures the production of a position-stable connection of the component 104 with the carrier plate 100 even before the melting of the solder paste 106, whereby a displacement, rotation or blurring of the component 104 can be reliably prevented. The dash-dotted lines in Fig. 3a indicate those areas of the carrier plate contact surface 102 and the lines 103, which lie under the Lötstopplack 101. For reasons of better depicting speed, the areas of the rectangular Trägerplattenkon contact surface 102, which are not covered by solder mask 101 and provided for the solder joint, drawn as solid lines; However, they are hidden in the view shown in Fig. 3a of the solder joint assembly by the component 104 and therefore not visible.
    4 shows a plan view of an exemplary layout of carrier plate contact surfaces 202 (the carrier plate contact surfaces 202 are shown in dashed lines, since they are concealed in view by the applied component 204) and solder paste surfaces 206 printed thereon for soldering an electronic component 204, in this case a diode four emitter surfaces, on a support plate 200. The respective corresponding contact surfaces of the support plate 200 and the component 204 are congruent. The overlapping of the pressure areas of the solder paste surfaces 206 with the contact surfaces 202 of the carrier plate 200 or with the congruent corresponding contact surfaces of the component 204 are clearly visible. As can also be clearly seen in FIG. 4, the solder paste 206 is applied according to the layout either along one longitudinal side or one transverse side of the respective contact surface to the adjacent solder mask layer 201 with minimal overlap with the contact surface. The areas between the individual contact surfaces serve during the soldering process as additional outgassing channels for the escaping flux, as described above in connection with FIGS. 2a-c, in detail.
    5 shows a top view of another exemplary layout of carrier plate contact surfaces 302 (the carrier plate contact surfaces 302 are shown in dashed lines, since they are concealed in top view by the applied component 304) and solder paste surfaces 306 printed thereon for soldering an electronic component 304, Here, a diode with two emitter surfaces, on a support plate 300. The respective corresponding contact surfaces of the support plate 300 and the component 304 are congruent. The two larger contact surfaces 302 have a large pad area and a small distance from each other. As can be clearly seen from FIG. 5, the solder paste 306 is printed onto the solder resist layer 301 adjoining the larger contact surfaces 302 of the carrier plate 300 in such a way that the overlapping regions lie in each case on one longitudinal side of the contact surfaces 302, the depth of the overlap starting from a minimum overlap increases. The largest overlap is achieved at one end of the long side, so that during the soldering process, the atmosphere can be displaced under the component in one direction. As a result, the propagation direction of the solder front 312 can be influenced and, without being bound to a certain theory, it predetermines a specific direction for the atmosphere to be escaped. The variation of the depth of Lotpastenüberlappungsbereichen on a side edge of the contact surfaces, here the longitudinal side, is particularly advantageous plate contact surfaces for large support and contact surfaces, which have only a small distance from each other.
    6 shows a plan view of another exemplary layout of carrier plate contact surfaces 402 (the carrier plate contact surfaces 402 are shown in dashed lines, since they are concealed in top view by the applied component 404) and solder paste surfaces 406 printed thereon for soldering an electronic component 404 (FIG. only partially shown), here a diode with two emitter surfaces, on a support plate 400. The respective contact surfaces 402 of the support plate 400 and the corresponding contact surfaces of the component 404 are congruent. The contact surface 402 is substantially square with four side edges and is bounded by a solder resist layer 401. As can be clearly seen from FIG. 6, the solder paste 406 is printed on the solder resist layer 401 such that the depth of the overlap with a side edge 402a of the contact surface 402 from the minimum overlap, which is approximately 0.3 mm, to the center the side edge 402a rises. This variant also makes it possible to influence the direction of propagation of the soldering front (represented by arrows) and, without being bound to a certain theory, predetermines a specific direction for the atmosphere to be escaped. This variant is also particularly advantageous for large carrier plate contact surfaces and for contact surfaces which have only a small distance from one another.
    7 shows a plan view of another exemplary layout of a carrier plate contact surface 502 (the carrier plate contact surface 502 is shown in dashed lines, since it is covered by the applied component 504 in a top view) and a solder paste surface 506 printed thereon for soldering an electronic component 504, Here, a diode with two emitter surfaces, on a support plate 500. The contact surface 502 of the support plate 500 and the corresponding contact surface of the component 504 are congruent. The contact surface 502 is substantially square with four side edges and is bounded by a solder resist layer 501. As can be clearly seen in FIG. 7, the solder paste 506 is printed on solder resist layer 501 so that the overlapping areas of the solder paste 506 with the contact surface 502 are respectively at a first side edge 502a and a second side edge 502b adjacent to the first side edge 502a. lie so that the atmosphere under the component during the soldering process can be displaced in one direction. In the case of rectangular contact surfaces, the solder paste 506 is applied at least in regions along a longitudinal side and along a transverse side (broad side, narrow side) of the contact surface 502. This variant also makes it possible to influence the direction of propagation of the solder front 512 (also shown by lines and arrows) and, without being bound to a certain theory, predetermines a specific direction for the atmosphere to be escaped. This variant is also particularly advantageous in the case of large carrier plate contact surfaces and in the case of contact surfaces which have only a slight distance from one another.
    Example 1: Comparison of the formation of voids in the soldering connection of electronic components on printed circuit boards with the soldering method according to the invention and with a standard soldering method.
    In this example, the formation of voids in the soldering connection of components to printed circuit boards was compared with the soldering method according to the invention and with a standard soldering method. For the comparative tests, IMS circuit boards from the manufacturer EUROSIR (Aluminum IMS with 1.5 mm aluminum thickness, Insulated Metal Substrates) were used. The solder paste was an SAC305 solder paste (manufacturer / source: Kester) and a soldering furnace from Rehm was used for the reflow soldering process. For the tests using the soldering method according to the invention and the standard method printed circuit boards were equipped with an LED component of the type Oslon Black Flat 1x4 (manufacturer: Osram) and six LED components of the type Oslon Compact. 24 printed circuit boards were used and processed simultaneously in the reflow process. The temperature ramps of the heating and cooling process, as well as the holding times follow the JEDEC standard. The total duration of the reflow process was 300 sec, the maximum temperature of 260 ° C was held for 5 sec.
    Subsequent to the respective soldering process by the method according to the invention or the standard method, the solder joints were tested for voids in an X-ray machine from Matrix Technologies. With a Voidanteil over 30% of the contact surface of a single pad was a soldered PCB / construction part arrangement as a failure.
    Standard soldering process:
    In the standard soldering process, the solder paste was printed directly and exclusively on the pads of the circuit board. Thus, the entire Lot offered after printing and equipping is directly under the LED components. Following reflow soldering, it was found that 20% of the processed circuit boards did not meet the above criteria due to void training and were therefore considered scrap. Fig. 8 (a) shows an X-ray image of a printed circuit board with soldered LED components (provided with the reference numeral 604). Metal surfaces appear in three gray levels of decreasing brightness: Cu tracks and spreader surfaces, solder-covered pads, and emitter surfaces above. The formed bubble voids (larger voids indicated by reference numeral 620) appear in the gray tone of the underlying Cu surfaces. In Fig. 8 (a), the void ratio of 30% is exceeded at the third contact area from the left.
    Inventive soldering method:
    In the soldering method according to the present invention, the solder paste (solder paste 206) according to the layout shown in FIG. 4 has been applied to the solder resist layer (solder resist layer 201) of the circuit board (support plate 200) in minimal overlap with the longitudinal sides of the pads / contact surfaces (support plate contact surfaces 202) Printed circuit board. If the solder according to the method according to the invention is provided substantially outside the contact surfaces, i. only a minimal failure was detected in about 1500 overlapping PCBs with only minimal overlap with the contact surfaces of the component and PCB. Fig. 8 (b) shows that the solder joints are substantially free of voids and that only minimal voids are present in the areas of the pad edge over which the solder has been pulled under the component.
    The invention may be modified in any manner known to those skilled in the art and is not limited to the embodiment shown. Also, individual aspects of the invention can be taken up and largely combined with each other. Essential are the ideas underlying the invention, which in view of this doctrine can be performed by a person skilled in many ways and still remain maintained as such.
    权利要求:
    Claims (17)
    [1]
    claims
    Method for soldering at least one electronic component (104, 204, 304, 404, 504) to a carrier plate (100, 200, 300, 400, 500), wherein the carrier plate has at least one carrier plate contact surface (102, 202, 302, 402 502) and the at least one electronic component has at least one corresponding component contact surface (105), wherein the at least one carrier plate contact surface is surrounded by a solder mask layer (101, 201, 301, 401, 501) which delimits the at least one carrier plate contact surface A method characterized by the following steps: a) at least partially applying solder paste (106, 206, 306, 406, 506) to the solder resist layer (101, 201, 301, 401, 501) and in minimal overlap with that adjacent to the solder resist layer Support plate contact surface (102,202, 302,402, 502), b) loading the carrier plate with the at least one electronic component (104, 204, 304, 404, 504), wherein i the at least one component contact surface (105) at least partially covers the corresponding at least one carrier plate contact surface (102, 202, 302, 402, 502), and c) heating the solder paste (106, 206, 306, 406, 506) to produce a soldered one Connection between the support plate and the at least one component.
    [2]
    2. The method according to claim 1, characterized in that the carrier plate contact surface (100, 200, 300, 400, 500) is formed substantially quadrangular and the solder paste (106, 206, 306, 406, 506) in minimal overlap with the Carrier plate contact surface along a longitudinal side and / or a transverse side of the carrier plate contact surface on the Lötstopplackschicht (101, 201, 301, 401, 501) is applied.
    [3]
    3. The method according to claim 2, characterized in that the solder paste (106, 206, 306, 406, 506) in minimal overlap with the carrier plate contact surface (102, 202, 302, 402, 502) along a longitudinal side of the carrier plate contact surface on the Lötstopplackschicht (101, 201, 301, 401, 501).
    [4]
    4. The method according to claim 2, characterized in that the solder paste (106, 206, 306, 406, 506) in minimal overlap with the carrier plate contact surface (102, 202, 302, 402, 502) along a transverse side of the carrier plate contact surface on the Lötstopplackschicht ( 101, 201, 301, 401, 501).
    [5]
    5. The method according to claim 2, characterized in that the solder paste (306, 406) along a longitudinal side (402 a) or a transverse side (402 a) of Trägerplattenkontaktf pool (302, 402) on the Lötstopplackschicht (301, 401) is applied, the depth of the overlap of the solder paste with the carrier plate contact surface, starting from a minimum overlap, increases in regions along the longitudinal side or the transverse side.
    [6]
    6. The method according to claim 2, characterized in that the solder paste (506) in minimal overlap with the carrier plate contact surface (502) along a longitudinal side (502a) and a transverse side (502b) of the carrier plate contact surface on the Lötstopplackschicht (501) is applied.
    [7]
    7. The method according to any one of claims 2 to 6, characterized in that the depth of the minimum overlap of the solder paste with the carrier plate contact surface along a longitudinal side of the carrier plate contact surface in a range of 0, 2 - 0.5 mm.
    [8]
    8. The method according to claim 7, characterized in that the depth of the minimum overlap of the solder paste with the carrier plate contact surface along one longitudinal side of the carrier plate contact surface is approximately 0.3 mm.
    [9]
    9. The method according to any one of claims 2 to 6, characterized in that the depth of the minimum overlap of the solder paste with the carrier plate contact surface along a transverse side of the carrier plate contact surface in a range of 0.3 - 0.7 mm.
    [10]
    10. The method according to claim 9, characterized in that the depth of the minimum overlap of the solder paste with the carrier plate contact surface along one longitudinal side of the carrier plate contact surface is about 0.5 mm.
    [11]
    11. The method according to any one of claims 1 to 10, characterized in that the at least one component contact surface (105) to the corresponding at least one support plate contact surface (102, 202, 302, 402, 502) completely covered.
    [12]
    12. The method according to any one of claims 1 to 11, characterized in that in or after step b) the at least one electronic component (104) is additionally fixed by means of adhesive dots (111) on the carrier plate (100).
    [13]
    13. The method according to claim 12, characterized in that the adhesive dots (111) consist of a thermosetting adhesive material, wherein the temperature required for the heat curing below the melting temperature of the solder paste (106).
    [14]
    14. The method according to any one of claims 1 to 13, characterized in that the at least one electronic component (104, 204, 304, 404) at least two component contact surfaces (105) and the carrier plate (100) at least two respective corresponding carrier plate contact surfaces (102 , 202, 302, 402).
    [15]
    15. The method according to any one of claims 1 to 14, characterized in that the at least one electronic component is an optoelectronic component.
    [16]
    16. The method according to claim 15, characterized in that the at least one optoelectronic component is an LED.
    [17]
    17. The method according to any one of claims 1 to 14, characterized in that the at least one electronic component is an SMD component.
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    同族专利:
    公开号 | 公开日
    EP3233345A1|2017-10-25|
    AT516750B1|2016-08-15|
    JP2017538295A|2017-12-21|
    WO2016094915A1|2016-06-23|
    JP6490223B2|2019-03-27|
    US20180093338A1|2018-04-05|
    US10843284B2|2020-11-24|
    CN107113978B|2020-02-21|
    CN107113978A|2017-08-29|
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    法律状态:
    2016-11-15| HC| Change of the firm name or firm address|Owner name: ZKW GROUP GMBH, AT Effective date: 20161014 |
    优先权:
    申请号 | 申请日 | 专利标题
    ATA50924/2014A|AT516750B1|2014-12-18|2014-12-18|Method for void reduction in solder joints|ATA50924/2014A| AT516750B1|2014-12-18|2014-12-18|Method for void reduction in solder joints|
    EP15808076.2A| EP3233345A1|2014-12-18|2015-11-18|Method for void reduction in solder joints|
    JP2017532671A| JP6490223B2|2014-12-18|2015-11-18|Method for reducing voids at solder locations|
    US15/536,377| US10843284B2|2014-12-18|2015-11-18|Method for void reduction in solder joints|
    PCT/AT2015/050295| WO2016094915A1|2014-12-18|2015-11-18|Method for void reduction in solder joints|
    CN201580069277.2A| CN107113978B|2014-12-18|2015-11-18|Method for reducing voids in solder joints|
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